1. Field of the Invention
This invention relates to a semiconductor device and its packaging, specifically to a packaging of semiconductor device that accommodates variable requirements of a user of the semiconductor device while maintaining good high frequency characteristics.
2. Description of the Related Art
Switching elements for high frequency signals have been a focus of development in many application areas including mobile communication equipment that utilizes microwaves in GHz frequency range and alternates antennas and receiving/transmitting signals. Such a device is described, for example, in Japanese Laid Open Patent Publication No. Hei 9-181642. This type of device often includes a field effect transistor (FET) functioning as a high frequency switch, which is made of a gallium arsenide (GaAs) material, and is integrated as a monolithic microwave integrated circuit (MMIC) having the high frequency switches.
An MMIC device with two GaAs switches, as a result of the most recent development is described in a commonly owned copending U.S. patent application Ser. No. 10/016,143, entitled xe2x80x9cCompound Semiconductor Switching Device.xe2x80x9d The disclosure of U.S. patent application Ser. No. 10/016,143 is, in its entirety, incorporated herein by reference. FIG. 1 is a plan view of a packaging structure of the device described in this U.S. Patent application. A chip 119 has two GaAs FET switches (not shown). One of the two switches has two input electrode pads 235a, 235b, an output electrode pad 235g and a control electrode pad 235h, another of the two switches has two input electrode pads 235c, 235d, an output electrode pad 235f and a control electrode pad 235e. Each of the control electrode pads 235e, 235h is shared by the two switches. Each of the eight electrode pads is connected to a corresponding terminal 135a-135h, which is disposed adjacent the electrode pad on an insulating substrate 122, by a bonding wire 137. The chip 119 is mounted on a base 125 that is a part of a lead pattern 127 including the terminals 135a-135h. 
One of the applications of this two-switch device is to alternate two pairs of complementary signals. For example, a mobile telephone needs to alternate between a CDMA (Code Division Multiple Access) signal and a GPS (Global Positioning System) signal. The connection scheme of this application is shown in FIG. 2. One of a pair of CDMA balanced signals is applied to the input electrode Ia1, and another to the input electrode Ib1. One of a pair of GPS balanced signals is applied to the input electrode Ia2, and another is to Ib2. In this configuration, depending on a control signal applied to each of the control electrode pads C1, C2 of the two switches, the balanced CDMA signal or the balanced GPS signal is selected and outputted to the two output electrode pads Oa, Ob.
However, a user of this two-switch device has to provide a wiring configuration that allows an intersection of one of the CDMA balanced signals and one of the GPS balanced signals. Since these are signals in an RF (Radio Frequency) range, such an intersecting wiring needs to be carefully designed to avoid mutual interference by the user and requires additional space to accommodate the intersection.
The invention provides a wiring board for mounting a surface mounted element. The wiring board includes an insulating substrate, a first terminal disposed on the substrate, a first lead disposed on the substrate and extending from the first terminal, and an insulating layer disposed on the first terminal, the first lead and the substrate. The wiring board further includes a second terminal disposed on the insulating layer, a second lead disposed on the insulating layer and extending from the second terminal, a third terminal disposed on the insulating layer, and a third lead disposed on the insulating layer and extending from the third terminal. A portion of the third lead is configured to have the surface mounted element mounted thereon. The wiring board also includes a fourth lead disposed on the insulating layer. The first terminal and the fourth lead are disposed opposite to each other with respect to the second lead. In this configuration, the first and second terminals are disposed on the same side of the wiring board with respect to the mounting portion of the third lead. The first lead runs underneath the mounting portion of the third lead and is connected to the fourth lead.
The invention also provides a packaging of a surface mounted element, which includes an insulating substrate, a first terminal disposed on the substrate, a first lead disposed on the substrate and extending from the first terminal, and an insulating layer disposed on the first terminal, the first lead and the substrate. The packaging further includes a second terminal disposed on the insulating layer, a second lead disposed on the insulating layer and extending from the second terminal, a third terminal disposed on the insulating layer, and a third lead disposed on the insulating layer and extending from the third terminal. The surface mounted element is mounted on a portion of the third lead. The packaging also includes a fourth lead disposed on the insulating layer. The first terminal and the fourth lead are disposed opposite to each other with respect to the second lead. In this configuration, the first and second terminals are disposed on the same side of the substrate with respect to the surface mounted element. The first lead runs underneath the mounting portion of the third lead and is connected to the fourth lead.
The invention further provides a semiconductor device, which includes an insulating substrate, a first terminal disposed on the substrate, a first lead disposed on the substrate and extending from the first terminal, and an insulating layer disposed on the first terminal, the first lead and the substrate. The semiconductor device also includes a second terminal disposed on the insulating layer, a second lead disposed on the insulating layer and extending from the second terminal, a third terminal disposed on the insulating layer, and a third lead disposed on the insulating layer and extending from the third terminal. The semiconductor device further includes a semiconductor chip mounted on a portion of the third lead and having a plurality of electrode pads formed on a surface thereof, and a fourth lead disposed on the insulating layer. The first terminal and the fourth lead are disposed opposite to each other with respect to the second lead. In this configuration, the first and second terminals are disposed on the same side of the substrate with respect to the semiconductor chip. The first lead runs underneath the mounting portion of the third lead and is connected to the fourth lead.